Texas Placement Paper -: DATA STRUCTURES Questions And Answers

Texas Previous Years Solved Sample Placement Papers

1. The CPU has 16 registers and supports 5 addressing modes. What is the instruction op-code length in bits?
   

   A. 32

   B. 24

   C. 30

   D. 36 Answer: Option A

2. In the iterative network shown, the output Yn of any stage N is 1 if the total number of 1s at the inputs from the first stage to the Nth stage is odd. The optimal logic structure for the box consists of:
   

   A. One AND gate and one NOR gate

   B. One NOR gate and one NAND gate

   C. Two XNOR gates

   D. One XOR gate Answer: Option D

3. Consider a circuit with N logic nets. If each net can be stuck-at values 0 or 1, in how many ways can the circuit be faulty?
   

   A. 2 and 2N

   B. N and 2^N

   C. 2N and 3^N-1 Answer: Option C

   D. 2N and 3N

4. In the circuit shown, if the setup time is 2 ns, clock-to-Q delay is 3 ns, and hold time is 1 ns, what is the maximum frequency of operation for the circuit?
   

   A. 200 MHz

   B. 333 MHz

   C. 250 MHz Answer: Option C

   D. None of the above

5. Which of the following statements is/are true?
   

   I. Combinational circuits may have feedback, sequential circuits do not.

   II. Combinational circuits have a 'memory-less' property, sequential circuits do not.

   III. Both combinational and sequential circuits must be controlled by an external clock.

   A. I only

   B. II and III only

   C. I and II only

   D. II only Answer: Option D

6. Consider an alternate binary number representation scheme, wherein the number of ones M in a word of N bits is always the same. This scheme is called the M-out-of-N coding scheme. If M = N/2 and N = 8, what is the efficiency of this coding scheme as against the regular binary number representation scheme?
   

   A. Close to 30%

   B. Close to 50%

   C. Close to 70%

   D. Close to 100% Answer: Option B

7. A CPU supports 4 interrupts: I1, I2, I3, and I4. It supports priority of interrupts and nested interrupts. Based on the sequence of interrupt service routines, what can we infer about the interrupt routines?
   

   A. I3 > I4 > I2 > I1

   B. I4 > I3 > I2 > I1

   C. I2 > I1; I3 > I4 > I1

   D. I2 > I1, I3 > I4 > I2 > I1 Answer: Option D

8. To boil 200 ml of water from 25°C to 100°C in one minute, what wattage is required for the heating element?
   

   A. Data given is insufficient

   B. 800 W

   C. 1000 W Answer: Option C

   D. 250 W

9. A sprinter running on a 100m platform with given conditions. At what uniform speed should the train travel for the sprinter to miss jumping into the open door at the platform's edge?
   

   A. Data given is insufficient

   B. 4 m/s

   C. 5 m/s Answer: Option C

   D. 7.5 m/s

10. State which of the following gate combinations does not form a universal logic set:
    

    A. 2-input AND + 2-input OR

    B. 2-to-1 multiplexer

    C. 2-input XOR + inverter Answer: Option C

    D. 3-input NAND

11. For a given circuit, what should the function F be so that it produces an output of the same frequency (F1) and an output of double the frequency (F2)?
    

    A. F1 = NOR gate and F2 = OR gate

    B. F1 = NAND gate and F2 = AND gate

    C. F1 = AND gate and F2 = XOR gate Answer: Option C

    D. None of the above

12. The FSM starts in state Sa (reset state). Which of the statements best describes the FSM?
    

    A. It has two states and is autonomous

    B. The information available is insufficient

    C. It is a Mealy machine with three states

    D. It is a Moore machine with three states Answer: Option D